Chris Freedom full bridge (D3/D4 added) at 4 V: CH1 'drain' reads 1.0–1.6 kV over a ~54 µs window, which is not physically a drain-source voltage; both plates step the same way (+15–20 V) vs 0 V reference = common mode

Bench: Chris Freedom, Discord #neuralstan20-testing 2026-11-07, handheld scope photos. Rig per #3527 plus forward diodes D3/D4 (UX-C2B moved/added per my advice; MURs in the flyback positions), switched 4 V, gate 54 µs on / 211 µs off. CH1 (x100 setting, 1000 V/div) on the drain; CH2 (50 V/div) on WFC− (shot 1) or WFC+ (shot 2); both grounds 'on 0v' (Chris's drawing labels the CT junction 0v; unconfirmed whether he meant CT or battery minus). Read off the grid (50 µs/div, approximate): one event per cycle, ~1.1 div ≈ 54 µs wide (≈ T1), period ≈ 5.3–5.6 div. CH1 Max 1.0 kV / 1.6 kV, Vpp 1.0 / 1.8 kV, Rms ~411 V. CH2 Max 22 V Vpp 20 V (WFC−), Max 12 V Vpp 20 V (WFC+); both plates step UP together during the window. Scope Fr ~19.5 kHz and +Du ~96% are counter artefacts. MY READING: CH1 cannot be the drain-source voltage: a flat 1–1.6 kV for ~54 µs is 2–3x the IRF840 BVdss (500 V); a true drain is LOW during the on-time; and volt-second balance (4 V x 54 µs = 216 V·µs) limits a 54 µs reset plateau to ~4 V above supply. Likely causes: reference on the CT instead of the MOSFET source (primary is galvanically isolated, so drain-vs-CT is primary common mode), and/or the recurring CH1 probe-scaling error (#3523: CH1/CH2 ratio 15–19:1). Plates moving together = common mode vs reference; with a full bridge the CT carries no cell current. Requested: calibration on the 4 V rail per channel; drain + gate with both grounds on the source; single-probe differential across the cell (ground clip on WFC−, tip on WFC+). Possible positive sign, unconfirmed: the ~210 kHz ring that dominated the 12 V flyback-only shot is mostly gone, replaced by a flat window with gate-like edges.