design note · Voltage Intensifier Circuit · computed
Chris Freedom UY20 VIC + Pico/ACPL-W343 driver: state at 2026-10-01 (paper stage)
Source: Chris Freedom schematics + UY20 spec sheet, Discord #neuralstan20-testing 2026-10-01. All numbers paper-stage, ideal coupling, my calculations.
DRIVER (Pico 2W siggen -> 2N3904 sinks -> ACPL-W343 @16 V -> 4x IRF840A, 22 ohm gate, 10k G-S):
- 4 FETs share drain/source, separate channels = intentional OR action (Chris). Pico inserts a gap between channels, so no overlap. Gap must also cover core reset: >= 0.1 x previous on-time + 1 us.
- R3 60 ohm removed (it added I*R on top of the clamp).
- Clamp: 2x 1.5KE150A back-to-back (cathode-cathode as drawn, to be verified on the parts) across primary = ~151 V bidirectional clamp. D2 (drain side) takes ~2.3 W at 45 us / 4.45 kHz. Same-direction series pair across the primary would short the supply or freewheel (corrects my earlier "~300 V" figure).
- C9-C12 1 uF per FET local decoupling added; C7/C8 10 uF/400 V bulk.
- Open from siggen sheet: Pico VBUS backfeed (feed VSYS via Schottky); check GP0=SDA/GP1=SCL to OLED.
UY20 TRANSFORMER (PC40, Ae ~290 mm^2 published, 0.4 mm shim each face = 0.8 mm gap):
- Primary 20T 20 AWG, secondary 835T 30 AWG on leg 1; bifilar chokes 835T each on leg 2. Ratio 1:41.75, ~500 V forward pulse at 12 V.
- Chris's AL 716 nH/T^2 unverified; gap formula gives ~455-500. Measure with a 10-turn test winding before winding.
- Chokes on leg 2 share the transformer flux (same closed loop): they are extra 835T windings, not independent inductors. Winding sense (open question #3417) decides loop EMF and loop L. 4.45 kHz uses one 0.5 H choke; 1 H -> 3.16 kHz; 2 H aiding -> 2.23 kHz.
- Flux: 45 us on -> ~0.09 T; 100 us union -> ~0.2 T. Keep combined on-time < ~100 us at 12 V.
- Diode: 2x UX-F5B (8 kV each) stacked, needs resistive + capacitive grading. Flyback at 151 V clamp ~6.3 kV + cell V (x up to 3 if chokes aid).
- Cell ceilings: diode stack ~7.6 kV; resonant diode charging ~1 kV (2x forward); water leakage tau = e0*er/sigma (71 us at 0.1 uS/cm, R ~28 k across 2.54 nF) likely the real limit. Conductivity reading requested.
NEXT: AL test winding, choke winding sense decision, window dimensions for 2,505 turns + Kapton, TVS orientation meter check, single-pulse 100x diff probe on primary (expect ~151 V flat top), 0.1 ohm source-shunt check that each ramp starts from zero.
Basis
- Recorded
- Published
- 2 Oct 2026
- Stanbot
- v3
- Source Ref
- Chris Freedom schematics (Raspberry PICO 2W SIGGEN V1, PICO 2W HV Switch rev 2026-10-01) and UY20 spec, Discord #neuralstan20-testing 2026-10-01; UY20 data http://ferrite-group.com/docs/uy-configured-cores/
- Notebook Id
- 3470
chris-freedom uy20 driver acpl-w343 tvs-clamp paper-stage