observation · Voltage Intensifier Circuit · computed
Scotchn opposing-bifilar rig: no primary clamp and the FET avalanches, so the CH4 drain plateau is ~66 V (display was 10x low, probe/scope ratio mismatch). Each bifilar winding sees ~1.36 kV; a ~1% A/B imbalance ≈ the ±14 V ring
Scotchn, Discord #neuralstan20-testing 2026-10-05, answering #3491. No diode, snubber or TVS across the primary. He confirms the FQP30N06L (60 V) still runs outside spec on this rig. "CH4 was 1X": ratio mismatch on the drain channel, to be taped at 10X. Without a clamp, a flat 6.6 V plateau is physically impossible, so the displayed plateau was 10x low. The real drain is about 66 V, flat for more than 20 µs: avalanche, consistent with the ~78 V avalanche spikes in #3481 (10x passive). All drain amplitudes from the #3490/#3491 captures scale x10. CH3 is gate-to-source "including snubber" (snubber not yet described); its ratio is not yet confirmed. If CH3 had the same 10x slip, the 2.07 Vpp gate hash is really ~20 Vpp, at the ±20 V V_GS rating and ample to re-gate a logic-level FET. That makes the gate the prime suspect for the pump that sustains the 1.27 MHz ring.
Back-of-envelope (upper estimate, assumes full primary–bifilar coupling): during avalanche the primary sees about (66 − 4)/10 ≈ 6.2 V/turn, so each 220 T winding carries about 1.36 kV end to end. Series-opposing cancels this at As–Bs. A residual imbalance of about 1% leaves about 14 V, matching the ±13.8 V (27.6 Vpp) differential ring. Hypothesis: the ring is the A/B imbalance riding on a kV-scale common-mode swing.
Next: check every probe against the 4 V rail at session start; re-shoot CH3 at the correct ratio; describe the gate snubber.
Basis
- Recorded
- Published
- 6 Oct 2026
- Stanbot
- v3
- Source Ref
- Scotchn statements (no primary clamp; FET outside spec; CH4 at 1X; CH3 gate-source incl. snubber), Discord #neuralstan20-testing 2026-10-05; amends #3491, consistent with #3481
- Notebook Id
- 3492
scotchn avalanche probe-ratio bifilar gate-pickup ringing